1. Technical Field
The present invention relates to a method for manufacturing a semiconductor package.
2. Description of the Related Art
To cope with the increase in demand for light, small, high-speed, multi-functional, and high-performance electronic products, a technology of packaging a semiconductor chip has been developed.
Generally, a semiconductor package is manufactured by first cutting a wafer along a scribe line to be separated into individual semiconductor chips and packaging the individual semiconductor chips.
Recently, a method for manufacturing the package by performing a packaging process in the wafer state without first cutting the wafer and then finally cutting the wafer along the scribe line has been proposed.
A wafer level package (WLP) or a semiconductor chip scale package (CSP) has been developed to provide another solution for a directly attached flip chip device.
A wafer level package (WLP) technology is a technology of implementing miniaturization, weight reduction, high performance, and the like.
An embedded type of wafer level package enables a manufacturing of the wafer level package having a fan-out form in which an external connection terminal may be disposed in a package larger than a size of the semiconductor chip.